Atria Logic Pvt. Ltd. provides the complete design services for PCI Express. (2.5GT/s, 5GT/s) Our expertise covers the breadth of PCI-SIG's 3.0 specification of PCIe. We have a highly skilled team of experts who can deliver the services on PCIe physical layer including
The PHY layer is essentially the PIPE (Physical Interface for PCIe Express). The designed PIPE interface follows the INTEL's PIPE spec. This Intel's spec is being used by other vendors like Xilinx, Altera and PLDA with slight modifications in LTSSM and power management states. However the basic Interface mentioned in Intel's spec is maintained by all vendors and so our design.
The main goal of Physical Layer is to establish the physical connection or channel for proper communication of transactions coming from above layer (Transaction Layer and Data Link Layer).
The main functions of Tx side of PHY layer are listed below
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