The AL-USB2D-CTRL fully synthesizable core implements a complete high/full-speed (480Mbps/12Mbps) peripheral controller that interfaces to a UTMI USB port transceiver on one side and to a system's microprocessor on the other. It is user-configurable for up to 15 IN and OUT endpoints, and includes power management and remote wake-up functions.

Options include a protocol aware DMA controller, support for a variety of widely used bus interfaces, and a UTMI Low Pin Interface (ULPI).

Designed for easy reuse in ASIC and FPGA implementations, the microcode-free design is strictly synchronous with positive-edge clocking, no internal tri-states and a synchronous reset; therefore scan insertion is straightforward. The core has been optimized and silicon proven on Xilinx and Altera FPGAs.

Block Diagram


  • USB 2.0 compliant device.
  • ULPI/ UTMI interface to the external PHY
  • 32bit Avalon or AHB slave interface to application.
  • Supports high speed (480Mbps), full speed (12Mbps) bit rates.
  • Supports Control, Bulk, Interrupt and Isochronous transfers.
  • Remote wake-up function capable.
  • Performs CRC check/generation.
  • Performs PID verification, address recognition and handshake evaluation and response.
  • Decodes and handles standard USB commands.
  • Endpoints, their parameters and FIFO densities are configurable.
  • Preconfigured for 3 endpoints (control, bulk in, bulk out)
  • Software/ Hardware controlled enumeration.
  • Compact plug-in solution for SOC applications.